REF=1V25, RES=12BIT, AT=1CYCLE
Scan Control Register
| REP | Scan Sequence Repetitive Mode |
| DIFF | Scan Sequence Differential Mode |
| ADJ | Scan Sequence Result Adjustment |
| RES | Scan Sequence Resolution Select 0 (12BIT): 12-bit resolution 1 (8BIT): 8-bit resolution 2 (6BIT): 6-bit resolution 3 (OVS): Oversampling enabled. Oversampling rate is set in OVSRSEL |
| REF | Scan Sequence Reference Selection 0 (1V25): VFS = 1.25V with internal VBGR reference 1 (2V5): VFS = 2.5V with internal VBGR reference 2 (VDD): VFS = AVDD with AVDD as reference source 3 (5V): VFS = 5V with internal VBGR reference 4 (EXTSINGLE): Single ended external reference 5 (2XEXTDIFF): Differential external reference, 2x 6 (2XVDD): VFS=2xAVDD with AVDD as the reference source 7 (CONF): Use SCANCTRLX to configure reference |
| AT | Scan Acquisition Time 0 (1CYCLE): 1 conversion clock cycle acquisition time for scan 1 (2CYCLES): 2 conversion clock cycles acquisition time for scan 2 (3CYCLES): 3 conversion clock cycles acquisition time for scan 3 (4CYCLES): 4 conversion clock cycles acquisition time for scan 4 (8CYCLES): 8 conversion clock cycles acquisition time for scan 5 (16CYCLES): 16 conversion clock cycles acquisition time for scan 6 (32CYCLES): 32 conversion clock cycles acquisition time for scan 7 (64CYCLES): 64 conversion clock cycles acquisition time for scan 8 (128CYCLES): 128 conversion clock cycles acquisition time for scan 9 (256CYCLES): 256 conversion clock cycles acquisition time for scan |
| PRSEN | Scan Sequence PRS Trigger Enable |
| CMPEN | Compare Logic Enable for Scan |